Spartan-3E logic analyzer

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I got the sump.org Logic Analyzer running on a Xilinx Spartan-3E FPGA starter kit board. This wasn't too difficult, but there were some annoying problems that I'll share with you.

Buying the board

The particular board is not sold by Xilinx anymore, but the company that actually designed the board for Xilinx, Digilent Inc., still sell it.

Installing and setting up the tools

Once again I downloaded and installed the 32-bit ISE WebPack 11.1 software on 32-bit Linux. It's a 2.8GB download which installs to roughly 5GB. (After deleting 1GB of .xinstall folders left from the installation.. wtf..) It seems that version 12.1 was released just recently and if you're using a version other than 11.1, or another operating system, then you may of course run into fewer problems, more problems, or just different problems.

Installation ran fine as a regular user. At the end of the installation I tried to do the upgrade to version 11.5 but didn't have enough disk space left. Now I can source the settings32.sh file in the directory I installed to and then run ise, impact, and the other programs.

I struggled for a while with iMPACT not finding the built-in Xilinx programmer cable on the starter kit board. There were two issues:

  1. Wrong firmware downloaded to the USB controller
  2. iMPACT stubbornly trying to use kernel windrvr instead of libusb
USB controller firmware

Xilinx provides a driver setup script which puts files in /etc/udev/rules.d and /usr/share but I prefered to make an ebuild for the Xilinx firmware package and have added it to my Portage overlay "stuge" which was included in the official layman list on 2010-06-14. If you're not using Gentoo you could most likely run the setup_pcusb script included in the tarball without issues, but note that newer versions of udev require some changes in the supplied rules.

iMPACT insists on ignoring libusb

Older versions of iMPACT used a really nasty kernel driver for accessing USB devices, but now it instead prefers to use libusb for the programmer access. Yay! But not so fast...

On my system iMPACT kept trying to use the old drivers, which I did not have installed and do not want to pollute my system with. According to Xilinx this means that "libusb is not installed", which is absolutely useless of course. It's very frustrating, and typical for closed source software, that information is not sufficiently specific. They need to document the actual assumptions made by their software, instead of publishing some nonsense high level description for what is a very low level system issue. Of course libusb was installed! Stupid.

Eventually I found the problem. It seems that iMPACT uses dlopen() to load "libusb.so", which is arguably a mistake by Xilinx developers. I believe that they should specify a filename with an explicit version instead, such as "libusb-0.1.so.4". The libusb-0.12-r5 package that I had installed unfortunately did not allow the unversioned dlopen() to work. The file found by dlopen("libusb.so") was /usr/lib/libusb.so, which was a small text file (a GNU ld script) used to redirect the linker to /lib/libusb.so when I compiled programs that used libusb. Similar files exist for other libraries. dlopen() needs a binary file however, it doesn't understand the linker script, so iMPACT was unable to load libusb, quietly resorted to requiring windrvr, and complained loudly when it wasn't found. There were no error messages about the failure to load libusb. I can't fix iMPACT, so I solved the problem by doing what I should have done long ago anyway; I removed libusb-0.1 and installed the libusb-compat-0.1.3 package instead, which provides backwards compatibility for libusb-0.1 applications and uses the much improved libusb-1.0 for communication. libusb-compat installs the binary library file in /usr/lib and /usr/lib/libusb.so is a symlink to it. Once it was installed iMPACT could find the programming cable via libusb without problems.

Downloading a logic analyzer

There's not much documentation for the sump.org logic analyzer package, which is too bad since it's a really useful design. There's even a minimal and pretty open hardware made explicitly for the sump.org design, and it costs only $45; the Open Logic Sniffer. If you have use for a LA and don't already have a suitable FPGA board around then I think the OLS is amazing value for money.

On the sump.org project page there are a few different versions available for download. The experimental Spartan 3E source is for the board that I used. The zip includes source for the PC Client (Java) and for the logic analyzer hardware design (VHDL). I added a sump-analyzer-0.8.1.ebuild to my overlay that builds the client and installs a launcher script called sump-analyzer. Non-Gentooers can download the slightly older v0.8 binary package to get a pre-built analyzer.jar, or compile their own with the following commands:

$ cd client/
$ javac -encoding iso-8859-1 $(find -name '*.java')
$ jar cfm analyzer.jar Manifest.txt $(find -name '*.class' -o -name '*.png')

Another great option is the highly portable sigrok open source software, which supports the sump hardware design as well as several other logic analyzer products.

From files to hardware

The fpga directory has the VHDL code that makes up the actual logic analyzer, and the UCF (User Constraint File) that specifies how the FPGA chip is connected. Now, let's make hardware from them:

Open ISE, create a new project, select Top-level source type HDL, click Next, set Family Spartan3E, Device XC3S500E, Package FG320, Speed -4 and Preferred Language VHDL, click Next twice (skip the "Create New Source" step), and in the "Add Existing Sources" step make sure to add all files in the fpga subdirectory except for la.ucf, la.vhd and license.txt, in particular la-S3ESK.ucf and la-S3ESK.vhd must be included. When you OK the "Project Summary" then ISE should add all 23 files without problems. Double click "Configure Target Device" under "Processes: la - Behavioral" in the lower half of the Design tab in the Design panel in ISE to run through Synthesis, Place & Route, and bitstream generation.

You may get a message about no iMPACT project file, just OK that so that iMPACT starts. Double-click "Boundary Scan" in the iMPACT Flows panel, then press Ctrl-I or select File->Initialize Chain in the menu. A dialog with settings for the three discovered devices appears, just OK that too. Double click the xc3s500e icon and assign the la.bit file created by ISE. Say No to the SPI or BPI PROM question. Right-click the xc3s500e icon and select Program. OK the same properties dialog again to send the bitstream to the FPGA.

When programming has succeeded the board is a logic analyzer, and you can start capturing signals! Don't forget a level shifter or series resistors if you want to capture 5V signals.

Notes
  • SW1:0 sets baud rate: 00=115k2 01=57k6 10=38k4 11=19k2
  • LED4:3 shows the baud rate set by SW1:0.
  • LED1:0 shows the (active low) TX and RX signals.
  • BTN_SOUTH is reset. LED6 shows the reset signal.
  • LED7 shows the external clock signal. (DIP-8 socket)
  • If capturing without an actual signal connected then remember to disable Noise Filter, or the logic analyzer doesn't see any data, and the capture seems to hang. Either apply an actual signal or close the capture, press BTN_SOUTH and then try again, making sure to disable the filter.
  • iMPACT uses a SysV IPC semaphore to "lock" the download cable. If it isn't closed cleanly or if it crashes, it may start saying "Cable is LOCKED. Retrying..." in the log, which is of course wrong. Remove the semaphore with semget(0x240157b1,1,0),0,IPC_RMID,NULL) in a C program, or reboot, to get iMPACT to find the cable again.
  • Look at la-S3ESK.ucf for the connections. All input channels are in the FX2 connector, but the first twelve are also on the more convenient J1, J2 and J4 headers.

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